1. Field of the Disclosure
The disclosure generally relates to a non-volatile semiconductor memory device and a reading method thereof, and more particularly, to a NAND flash memory and a reading method of a negative threshold voltage of a memory cell of the NAND flash memory.
2. Description of Related Art
A page reading method of a NAND flash memory is performed by alternatively reading pages including even-numbered bit lines or alternatively reading pages including odd-numbered bit lines. When the even-numbered pages are selected, the even-numbered pages are to be connected to a sense amplifier so as to perform the reading of the even-numbered pages; during this period, the non-selected odd-numbered pages will be separated from the sense amplifier, and a shielding potential such as ground level will be supplied to the odd-numbered bit lines so as to lower noises caused by capacitive couplings between adjacent bit lines. A patent document 1 (Japanese Unexamined Patent Publication No. 11-176177) shows a conventional non-volatile semiconductor storage.